Chip Carriers as a Means for High-Density Packaging

For many years now, the system designer has had to weigh the low yield, small size, and high cost of multichip hybrids against the relatively low cost, but high weight and volume of conventional dual-in-line package/printed wiring board (DIP/PWB) assemblies when dealing with complex, high-density system functions. Texas Instruments´ approach to solving this problem is described using chip-carrier packaging techniques. A brief introduction to chip-carrier packages is given. A discussion of the various ways to use these packages in assemblies follows. The advantages of the use of chip-carrier packaging techniques as adopted by Texas Instruments in terms of assembly size and weight reduction, improved thermal and electrical performance, and assembly repairability are discussed. The possibilities of automation of such assemblies are described. A brief section describes, in some detail, the applications of chip-carrier packaging techniques considered for use at Texas Instruments. In each case, the resultant application benefits are detailed.