Input-driven partitioning methods and application to synthesis on table-lookup-based FPGAs

A synthesis approach for a set of Boolean functions on table-lookup-based field programmable gate arrays is proposed. Synthesis is considered as a global problem and, therefore, includes suitable factorization techniques as well as decomposition methods relying on the factored form. The factorization step looks for lexicographical expressions of Boolean functions. Some trade-offs between a strict input-driven decomposition and a maximal cell filling strategy are presented. The approach is applied to the Xilinx XC3000 and XC4000 series. Decomposition techniques both for area and speed optimization are detailed and their performance is compared to all available performance results