A novel 0.5- mu m n+-p+ poly-gated salicide CMOS process

A novel salicided twin-tub 0.5- mu m CMOS process using germanium implantation is presented. n⁺ and p⁺ dopants are implanted after salicide formation to fabricate devices with low junction leakage and low silicide-to-diffusion contact resistance. Germanium implantation prior to silicide formation is used to control short-channel transistor characteristics. A significant reduction in the lateral n^- and p^- diffusion is observed for germanium-implanted LDD (lightly doped drain) MOSFETs, resulting in minimized overlap capacitance as well as improved short-channel behavior.