DocumentCode :
956416
Title :
off-State Avalanche-Breakdown-Induced on-Resistance Degradation in Lateral DMOS Transistors
Author :
Chen, Jone F. ; Lee, J.R. ; Wu, Kuo-Ming ; Huang, Tsung-Yi ; Liu, C.M. ; Hsu, S.L.
Author_Institution :
Nat. Cheng Kung Univ., Tainan
Volume :
28
Issue :
11
fYear :
2007
Firstpage :
1033
Lastpage :
1035
Abstract :
In this letter, on-resistance RON degradation in lateral double-diffused MOS transistors is observed when the device is operated under off-state avalanche-breakdown condition. Although interface states and positive oxide-trapped charges are created near the drain, interface-state generation is identified to be the main degradation mechanism. Technology computer-aided design simulation suggests that the driving force of damage is breakdown-induced hole injection. Experimental data show that RON degradation has the tendency to saturate, in agreement with the saturation of interface-state generation and oxide-trapped charges data extracted by charge-pumping measurement.
Keywords :
MOSFET; avalanche breakdown; DMOS transistors; RON degradation; charge-pumping measurement; computer-aided design simulation; interface-state generation; lateral double-diffused MOS transistors; off-state avalanche-breakdown-induced on-resistance degradation; positive oxide-trapped charges; Avalanche breakdown; Breakdown voltage; CMOS technology; Charge pumps; Computational modeling; Computer simulation; Current measurement; Degradation; Design automation; MOSFETs; Avalanche breakdown; high voltage; lateral DMOS (LDMOS); reliability;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2007.907416
Filename :
4367542
Link To Document :
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