DocumentCode
956557
Title
Memory/speed tradeoffs for look-up table decoding of systematic linear block codes
Author
Hertz, David ; Azenkot, Yehuda
Author_Institution
Center for Signal Process., Haifa, Israel
Volume
38
Issue
1
fYear
1990
fDate
1/1/1990 12:00:00 AM
Firstpage
109
Lastpage
111
Abstract
Memory/speed tradeoffs are presented for the implementation of systematic linear block code decoders using lookup tables. Specifically, the authors show how to reduce the size of the lookup table that converts the syndrome into the error pattern. On the basis of such a single-error-correcting decoder they propose a t -stage decoder that can correct up to t errors. It is shown that the proposed scheme actually constitutes a general method for compressing lookup tables
Keywords
decoding; error correction codes; table lookup; error correction; look-up table decoding; memory/speed tradeoffs; single-error-correcting decoder; systematic linear block codes; t-stage decoder; Array signal processing; Block codes; Communications Society; Decoding; Error correction; Parity check codes; Table lookup;
fLanguage
English
Journal_Title
Communications, IEEE Transactions on
Publisher
ieee
ISSN
0090-6778
Type
jour
DOI
10.1109/26.46535
Filename
46535
Link To Document