DocumentCode
956798
Title
Demonstration of Low Vt Ni-FUSI N-MOSFETs With SiON Dielectrics by Using a Dy2O3 Cap Layer
Author
Yu, H.Y. ; Chang, S.Z. ; Veloso, A. ; Lauwers, A. ; Adelmann, C. ; Onsia, B. ; Lehnen, P. ; Kauerauf, T. ; Brus, S. ; Yin, K.M. ; Absil, P. ; Biesemans, S.
Author_Institution
Interuniv. Microelectron. Center, Leuven
Volume
28
Issue
11
fYear
2007
Firstpage
957
Lastpage
959
Abstract
This letter reports a novel approach to achieve low threshold voltage (Vt) Ni-fully-silicide (FUSI) nMOSFETs with SiON dielectrics. By using a dysprosium-oxide (Dy2O3) cap layer with a thickness of 5 Aring on top of the SiON host dielectrics, Vt,lin of 0.18 V for long-channel devices (Lg = 1 mum) using NiSi-FUSI electrode is obtained, satisfying the high-performance device requirements. The Vt modulation due to the Dy2O3 cap layer is also maintained in the short-channel devices (with an Lg,min of 90 nm as demonstrated in this letter). In particular, approximately 150times reduction in gate leakage current is seen while preserving the dielectric capacitance equivalent thickness after adding the Dy2O3 cap layer on SiON dielectrics, likely due to a high-k layer (DySiON) formation during device source/drain activation process. We also report that the Dy2O3 layer does not vitally degrade the device reliability, such as positive-bias temperature instability and time-dependant dielectrics breakdown.
Keywords
MOSFET; dysprosium compounds; high-k dielectric thin films; leakage currents; semiconductor device breakdown; semiconductor device reliability; silicon compounds; SiON-Dy2O3 - Interface; cap layer; device reliability; device source/drain activation process; dielectric capacitance equivalent thickness; high-k layer; leakage current; low threshold voltage MOSFETs; positive-bias temperature instability; time-dependant dielectrics breakdown; Capacitance; Degradation; Dielectric devices; Electrodes; High K dielectric materials; High-K gate dielectrics; Leakage current; MOSFETs; Temperature; Threshold voltage; Dysprosium-oxide $(hbox{Dy}_{2}hbox{O}_{3})$ cap layer; Ni-FUlly-SIlicide (FUSI); SiON; low $V_{t}$ nMOSFETs;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2007.906464
Filename
4367580
Link To Document