DocumentCode :
956800
Title :
Reactor characterization for a process to etch Si3N4 formed on thin SiO2
Author :
Riley, Paul E. ; Defonseka, Brian N. ; Sum, Joyce C. ; Figueredo, Domingo
Author_Institution :
Hewlett-Packard Co., Palo Alto, CA, USA
Volume :
6
Issue :
3
fYear :
1993
fDate :
8/1/1993 12:00:00 AM
Firstpage :
290
Lastpage :
292
Abstract :
A plasma etching process for patterning LPCVD (low-pressure chemical vapor deposition) Si3N4 which has been formed on thin thermally grown SiO2 has been developed and characterized with an Applied Materials 8110 batch system using 100-mm-diameter silicon wafers. To fulfill the primary process objectives of minimal critical dimension (CD) loss (~0.08 μm), vertical profiles after etch, retention of some of the underlying thermal SiO2, and batch etch uniformity, the reactor has been characterized by evaluating the effects of variation of reactor pressure (15 to 65 mTorr), O2 concentration by flow rate (30 to 70%) of an O2/CHF2 mixture, and DC bias voltage (-200 to -550 V). Analysis of the resulting etch rate, etch uniformity, dimensional, and profile data suggests that satisfactory processing may be achieved at low reactor pressure (~25 mTorr), 50-60% O2 by flow rate in O2/CHF3, and low DC bias (-200 to -250 V)
Keywords :
batch processing (industrial); insulating thin films; semiconductor technology; silicon compounds; sputter etching; -200 to -550 V; 15 to 65 mtorr; Applied Materials 8110 batch system; DC bias voltage; LPCVD; Si3N4-SiO2; batch etch uniformity; critical dimension loss; etch rate; etch uniformity; plasma etching process; process objectives; reactor pressure; vertical profiles; Circuits; Etching; Inductors; Plasma applications; Plasma materials processing; Semiconductor films; Silicon; Space technology; Ultra large scale integration; Voltage;
fLanguage :
English
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on
Publisher :
ieee
ISSN :
0894-6507
Type :
jour
DOI :
10.1109/66.238183
Filename :
238183
Link To Document :
بازگشت