DocumentCode :
956836
Title :
Multi/demultiplexing in Gbit/s range using dual gate GaAs m.e.s.f.e.t.s
Author :
Beneking, H. ; Filensky, W. ; Ponse, F.
Author_Institution :
Aachen Technical University, Institute of Semiconductor Electronics, Aachen, West Germany
Volume :
16
Issue :
14
fYear :
1980
Firstpage :
551
Lastpage :
552
Abstract :
Multiplexing from 1 to 2 Gbit/s and corresponding demultiplexing from 2 to 1 Gbit/s including clock regeneration and pulse width reduction has been performed using dual gate GaAs m.e.s.f.e.t.s. Circuits and time behaviour of input, clock and output signals are shown.
Keywords :
Schottky gate field effect transistors; data transmission equipment; field effect transistor circuits; multiplexing equipment; pulse shaping circuits; Gbit/s range; clock regeneration; clock signals; demultiplexing; digital data transfer systems; dual gate GaAs MESFET; input signals; multiplexing; output signals; pulse width reduction; time behaviour;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19800383
Filename :
4244154
Link To Document :
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