DocumentCode :
957823
Title :
High - Density High - Impedance Hybrid Circuit Technology for Gigahertz Logic
Author :
Lewis, Edward T.
Author_Institution :
Missile Systems Division,MA
Volume :
2
Issue :
4
fYear :
1979
fDate :
12/1/1979 12:00:00 AM
Firstpage :
441
Lastpage :
450
Abstract :
A novel hybrid substrate technology suitable for use as a relatively dense interconnecting medium for very high-speed digital logic devices is presented. It has been well established that as the signal rise and fall times of logic circuits become extremely short, the propagation of these signals between devices must be conducted along transmission line structures. Therefore, hybrid substrate technologies must be capable of realizing interconnects between chips which possess desired highfrequency transmission characteristics. This implies a specific, uniform wave impedance, low attenuation, reasonably good isolation between signal lines, and the ability to provide for line matching at either the sending end or receiving end of any path. In order to obtain these transmission properties in a reasonably dense interconnect array, the structures and fabrication technologies must be chosen so that very small linewidths and spacings can be achieved, while maintaining the desired transmission characteristics. Another important consideration is related to the output impedance characteristics of the emerging high-speed digital circuit technologies. Currently, ECL technology is the most widely used for the implementation of complex digital systems requiring ultra-high switching speeds. However, predictions on the potential increase in achievable switching speeds for this technology are limited to 200 to 400 ps. One of the desirable characteristics of this technology is its reasonably low output impedance. This permits the interfacing to a relatively low impedance (50-70 Omega ) for driving between devices in a conventional transmission line environment. Newer circuit technologies, such as that employing GaAs MESFET´s, offer the potential of much shorter switching times (50 to 100 ps). However, this circuit family possesses an inherently higher output impedance when configured in large integrated arrays. Thus the characteristic impedance of the supporting transmission structure must be high in order to minimize the signal attenuation between communicating chips. In fact, a high-impedance transmission structure would be advantageous for any high-speed circuit family, in that it would reduce the amount of power required to drive the information between devices. For these - reasons a fine-line monolithic hybrid substrate technology is proposed that can best meet these goals. Although there are several approaches that can be considered to obtain reasonably fine-line transmission structures, it will be shown that by using sapphire as a supporting structure, very narrow widths (5-10 mum) of aluminum interconnecting transmission lines can be defined yielding 100 to 200-Omega characteristic impedances.
Keywords :
Hybrid integrated-circuit interconnections; Logic devices; Semiconductor logic circuits; Attenuation; Digital circuits; Distributed parameter circuits; Fabrication; Impedance; Integrated circuit interconnections; Isolation technology; Logic circuits; Logic devices; Power transmission lines;
fLanguage :
English
Journal_Title :
Components, Hybrids, and Manufacturing Technology, IEEE Transactions on
Publisher :
ieee
ISSN :
0148-6411
Type :
jour
DOI :
10.1109/TCHMT.1979.1135478
Filename :
1135478
Link To Document :
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