Title :
Binary-coded modulo-seven negator
Author :
Budrikis, Z.L. ; Cantoni, Antonio ; Perry, R.R.
Author_Institution :
University of Western Australia, Department of Electrical Engineering, Perth, Australia
Abstract :
A circuit consisting of four NOR gates multiplies modulo-seven integers, represented by binary digits on three input lines, by six. In modulo-seven arithmetic, this is equivalent to negation, and the circuit is a negator. Negators, together with standard flip-flops and half adders, yield all primitive components needed for binary-coded modulo-seven linear sequential networks.
Keywords :
logic circuits; sequential circuits; binary coded modulo seven negator; flip flops; half adders; linear sequential networks;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19710122
