DocumentCode
959141
Title
Detection of Multiple Faults in Combinational Logic Networks
Author
Kohavi, Igal ; Kohavi, Zvi
Issue
6
fYear
1972
fDate
6/1/1972 12:00:00 AM
Firstpage
556
Lastpage
568
Abstract
New techniques are presented for generating fault-detection experiments for combinational logic networks. Only single-output functions are considered. Test-covering and test-equivalence relations between networks are defined and these relations are shown to be Instrumental in generating the experiments. The techniques presented provide minimal experiments for detecting multiple faults In two-level networks and provide nearly minimal experiments for most other networks.
Keywords
Circuit faults; Circuit testing; Fault detection; Fault diagnosis; Helium; Instruments; Inverters; Logic testing; Research and development; Wire; Combinational logic; diagnosis; fault detection; multiple faults; test equivalence; testing;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1972.5009008
Filename
5009008
Link To Document