DocumentCode :
959271
Title :
SALSA: a new approach to scheduling with timing constraints
Author :
Nestor, John A. ; Krishnamoorthy, Ganesh
Author_Institution :
Dept. of Electr. & Comput. Eng., Illinois Inst. of Technol., Chicago, IL, USA
Volume :
12
Issue :
8
fYear :
1993
fDate :
8/1/1993 12:00:00 AM
Firstpage :
1107
Lastpage :
1122
Abstract :
An approach to scheduling in high-level synthesis that meets timing constraints while attempting to minimize hardware resource costs is described. The approach is based on a modified control/data-flow graph (CDFG) representation called SALSA. SALSA provides a simple move set that allows alternative schedules to be quickly explored while maintaining timing constraints. It is shown that this move set is complete in that any legal schedule can be reached using some sequence of move applications. In addition, SALSA provides support for scheduling with conditionals, loops, and subroutines. Scheduling with SALSA is performed in two steps. First, an initial schedule that meets timing constraints is generated using a constraint solution algorithm adapted from layout compaction. Second, the schedule is improved using the SALSA move set under control of a simulated annealing algorithm. Results show the scheduler´s ability to find good schedules which meet timing constraints in reasonable execution times
Keywords :
circuit layout CAD; graph theory; scheduling; simulated annealing; SALSA; conditionals; constraint solution algorithm; control/data-flow graph; high-level synthesis; layout compaction; loops; scheduling; simulated annealing algorithm; subroutines; timing constraints; Compaction; Costs; Flow graphs; Hardware; High level synthesis; Law; Legal factors; Resource management; Scheduling algorithm; Timing;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.238604
Filename :
238604
Link To Document :
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