DocumentCode
959954
Title
First direct beta measurement for parasitic lateral bipolar transistors in fully-depleted SOI MOSFET´s
Author
Ver Ploeg, E. ; Nguyen, Cam ; Kistler, N. ; Wong, Simon ; Woo, Jiyong ; Plummer, James
Author_Institution
Stanford Univ., CA
Volume
40
Issue
11
fYear
1993
fDate
11/1/1993 12:00:00 AM
Firstpage
2101
Lastpage
2102
Abstract
Summary form only given. Direct measurements of β values in SOI (silicon-on-insulator) MOSFETs biased in normal operating regimes are presented. The measurements were made on an SOI structure that allows for the efficient collection of the hole current after it has entered the source region and caused the bipolar back-injection of electrons. By measuring the drain and substrate currents and making extrapolated estimates of the intrinsic MOS channel current, it is possible to calculate values of the gain of the parasitic bipolar device for any bias condition. The V GS=V T case is of greatest interest, because the drain-to-source breakdown voltage is generally smallest for this value of gate potential. β was found to be highly dependent on the value of V D, with β falling dramatically with increasing V D. As V D is increased from 2.5 V to 4.5 V, with V GS-V T held at 0 V , β falls from about 1000 to 20 for an L =1.3 μm, T SOI=1000 Å device
Keywords
insulated gate field effect transistors; semiconductor device testing; semiconductor-insulator boundaries; 1.3 micron; beta measurement; drain current; drain-to-source breakdown voltage; fully depleted SOI MOSFET; gain; hole current; intrinsic MOS channel current; normal operating regimes; parasitic lateral bipolar transistors; substrate currents; Bipolar transistors; Charge carrier processes; Current measurement; Electric breakdown; Feedback; Gain measurement; Impact ionization; Joining processes; MOSFET circuits; Silicon;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.239766
Filename
239766
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