A new recessed gate MOSFET structure with the graded source/drain

Author

Lee, Wen-Hsian ; Park, Young-Jin ; Lee, Jonah D.

Author_Institution

Dept. of Electron. Eng., Seoul Nat. Univ.

Volume

40

Issue

11

fYear

1993

fDate

11/1/1993 12:00:00 AM

Firstpage

2102

Lastpage

2103

Abstract

Summary form only given. A gate recessed MOS (GR-MOS) structure with the selectively halo-doped channel by boron implantation carried out after graded (source/drain) (S/D) formation is proposed. The S/D is formed without n⁺ counter-doping to the channel doping. Initial characterization results of GR-MOSFETs having a 0.25 μm channel length are presented in comparison with the conventional lightly doped drain (LDD)-MOSFETs. It was verified that the new concept gives improved device characteristics over the LDD structure for a wide range of bias conditions and channel lengths, and renders the device design window wider in deep submicron devices

Keywords

insulated gate field effect transistors; ion implantation; 0.25 micron; Si:B-SiO₂; bias conditions; channel length; deep submicron devices; device design window; gate recessed MOS structure; graded source/drain; recessed gate MOSFET structure; selectively halo-doped channel; Charge carrier processes; Doping; Electrical resistance measurement; Electron devices; Hot carriers; MOSFET circuits; Monte Carlo methods; Quantization; Thickness control; Transconductance;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.239767

Filename

239767