• DocumentCode
    960022
  • Title

    Roundings in Floating-Point Arithmetic

  • Author

    Yohe, J.Michael

  • Author_Institution
    Mathematics Research Center, University of Wisconsin, Madison, Wis.
  • Issue
    6
  • fYear
    1973
  • fDate
    6/1/1973 12:00:00 AM
  • Firstpage
    577
  • Lastpage
    586
  • Abstract
    In this paper we discuss directed roundings and indicate how hardware might be designed to produce proper upward directed, downward directed, and certain commonly used symmetric roundings. Algorithms for the four binary arithmetic operations and for rounding are presented, together with proofs of their correctness; appropriate formulas for a priori error analysis of these algorithms are presented. Some of the basic applications of directed roundings are surveyed.
  • Keywords
    Algorithm design and analysis; Computational modeling; Computer aided manufacturing; Error analysis; Floating-point arithmetic; Hardware; Horses; Software algorithms; Terminology; Data format; directed rounding; guard digits; ideal floating-point hardware; rounding;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.1973.5009110
  • Filename
    5009110
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=960022