Title :
Roundings in Floating-Point Arithmetic
Author_Institution :
Mathematics Research Center, University of Wisconsin, Madison, Wis.
fDate :
6/1/1973 12:00:00 AM
Abstract :
In this paper we discuss directed roundings and indicate how hardware might be designed to produce proper upward directed, downward directed, and certain commonly used symmetric roundings. Algorithms for the four binary arithmetic operations and for rounding are presented, together with proofs of their correctness; appropriate formulas for a priori error analysis of these algorithms are presented. Some of the basic applications of directed roundings are surveyed.
Keywords :
Algorithm design and analysis; Computational modeling; Computer aided manufacturing; Error analysis; Floating-point arithmetic; Hardware; Horses; Software algorithms; Terminology; Data format; directed rounding; guard digits; ideal floating-point hardware; rounding;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1973.5009110
