• DocumentCode
    960363
  • Title

    Dislocation free gate process using in situ doped polysilicon thin films by crystallization-induced stress of the films

  • Author

    Miura, Hidekazu ; Asayama, K. ; Ohta, Hitoyoshi ; Ikeda, Shoji

  • Volume
    40
  • Issue
    11
  • fYear
    1993
  • fDate
    11/1/1993 12:00:00 AM
  • Firstpage
    2127
  • Lastpage
    2128
  • Abstract
    Summary form only given. In situ doped polysilicon thin films have been found useful for half-micron technology because the film deposition process is simple and the film surface is rather flat. The characteristics of the film are evaluated experimentally to apply it to a gate electrode material. It is confirmed that the film has much better tolerance to HF penetration than the conventional POCl3-treated polysilicon thin film, and has good surface flatness. However, abnormal leakage current is observed in MOSFETs using the in situ doped polysilicon gate, while the leakage current of the MOSFETs using the conventional POCl3 treated polysilicon gate is low and stable. The abnormal leakage current is found to be caused by dislocations in the silicon substrate at the gate edges. The films must be annealed fully to eliminate dislocations at the gate edges, which results in a low and stable leakage current level of MOSFETs
  • Keywords
    elemental semiconductors; insulated gate field effect transistors; internal stresses; semiconductor thin films; silicon; HF penetration; MOSFETs; crystallization-induced stress; dislocations; film deposition process; film surface; gate edges; gate electrode material; half-micron technology; in situ doped polysilicon thin films; leakage current; surface flatness; Annealing; Electrodes; Hafnium; Leakage current; MOSFETs; Silicon; Sputtering; Substrates; Surface treatment; Transistors;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.239806
  • Filename
    239806