Title :
Testable Sequential Cellular Arrays
Author :
Sung, Chia-Hsiaing
Author_Institution :
Department of Applied Mathematics and Computer Science and the Engineering Computing Laboratory, University of Louisville, Louisville, KY 40208.
Abstract :
The progress of semiconductor technology has been a dominant factor on the use of cellular arrays in digital computer design. When a subsystem is implemented in the form of a cellular array, it is important that the subsystem can be tested at the array terminals for the presence of a faulty cell in the array. In this paper some sufficient conditions for the testability of two-dimensional sequential cellular arrays are derived. These can be either unilaterally interconnected or bilaterally interconnected arrays where each cell has some storage elements and logic circuits.
Keywords :
Arithmetic; Circuit faults; Circuit testing; Fault detection; Integrated circuit interconnections; Logic arrays; Semiconductor device testing; Sequential analysis; Sorting; Sufficient conditions; Bilateral arrays; cellular arrays; fault detection; fault location; information losslessness (IL); sequential arrays; unilateral arrays;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1976.5009199
