Title :
Analysis of Thermal Cycle Fatigue Damage in Microsocket Solder Joints
Author :
Levine, Ernest ; Ordonez, J.
Author_Institution :
IBM Gen. Tech. Div., NY
fDate :
12/1/1981 12:00:00 AM
Abstract :
A technique was developed to study thermal cycle (TC) fatigue damage in microsocket solder joints, known as "C-4" (controlled-collapse chip connection). The procedure consists of cutting both a chip and a substrate to within 125 µm of the outside edge, followed by a joining operation. The result is a completed module with C-4 joints exposed along the outside. Scanning electron microscopy (SEM) is used to successively photograph the joints at intervals in the stress cycle, thereby showing the gradual buildup of thermal cycle damage that degrades the C-4 joint. This technique is used to determine damage mechanisms in representative C-4\´s that have been subjected to accelerated test conditions. In particular we will show that predominant deformation mechanisms and damage location sites are altered as the C-4 volume, and thus height, is changed. For small volumes, damage is uniform throughout the C-4 and consists of the nucleation of multiple cracks that eventually link up to cause major cracks. For higher volumes the middle section of the C-4 is relatively damage-free, with the majority of the damage occurring near the chip. Stresses generated by solder-Si mismatch are shown to play a significant role in conditioning the region near the chip to develop subsequent damage.
Keywords :
Integrated circuit interconnections; Integrated circuit thermal factors; Interconnections, Integrated circuits; Soldering; Fatigue; Joining processes; Laboratories; Life estimation; Scanning electron microscopy; Silicon; Soldering; Testing; Thermal degradation; Thermal stresses;
Journal_Title :
Components, Hybrids, and Manufacturing Technology, IEEE Transactions on
DOI :
10.1109/TCHMT.1981.1135845