DocumentCode
961622
Title
Efficient output phase assignment algorithm for PLAs
Author
Hsu, W.-J. ; Shen, W.-Z.
Author_Institution
Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume
140
Issue
5
fYear
1993
fDate
10/1/1993 12:00:00 AM
Firstpage
360
Lastpage
366
Abstract
To implement a multiple output function, one has the option to realise each output with either true logic or complementary logic following with an inverter. This paper, proposes an efficient algorithm to solve this output phase assignment problem for PLA implementation. Instead of using the double-phase cover minimisation approach, a property-checking procedure is used to estimate the cost of assignments. With the estimated costs, an assignment with minimum cost is chosen. The experimental results show that the proposed algorithm can obtain excellent assignment compared with other approaches
Keywords
logic CAD; logic arrays; PLAs; assignment cost; logic design; multiple output function; output phase assignment algorithm; property-checking procedure;
fLanguage
English
Journal_Title
Circuits, Devices and Systems, IEE Proceedings G
Publisher
iet
ISSN
0956-3768
Type
jour
Filename
240141
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