DocumentCode :
961625
Title :
On a Varistructured Array of Microprocessors
Author :
Lipovski, G. Jack
Author_Institution :
University of Texas, Austin, TX 78712.
Issue :
2
fYear :
1977
Firstpage :
125
Lastpage :
138
Abstract :
The varistructure architecture gives the user the opportunity to specify the height and width of his primary memory ``at run time.´´ This architecture, first proposed in 1973, has now been simplified to make it schedulable, extended to allow SIMD vector-vector operations, and further extended to provide variable structure within a task. Memory is efficiently utilized in that memory bandwidth can be increased for array processing, yet memory space is not wasted during string processing. The fetch-execute cycle operation is analyzed herein, and some tentative results regarding input-output and data communication between processing entities are reported. On the basis of the simplicity of the fetch-execute cycle, there is hope that this architecture may well be the best way to build minicomputers and large computers using a cellular array of microprocessors.
Keywords :
Array signal processing; Bandwidth; Computer architecture; Costs; Microcomputers; Microprocessors; Parallel processing; Predictive models; Processor scheduling; Weather forecasting; Computer architecture; SIMD computer; microprocessor array; reconfigurable computer; supercomputer; varistructure;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1977.5009291
Filename :
5009291
Link To Document :
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