Title :
An Optimal Frame Synchronization Technique Using an Associative Processor
Author :
Saxton, Terrence L. ; Huang, Cheng-Chi
Author_Institution :
Systems and Research Center, Honeywell, Inc., Minneapolis, MN 55413.
Abstract :
Data loss resulting from the time to regain frame synchronization following detection of an out-of-frame condition on a synchronous time-division multiplexed bus or line, such as the Bell System T1 digital line, can be substantial. Most current sequential schemes require many frame times to separate with high probability the true frame pattern from identical patterns occurring temporarily in random data. A parallel search technique and a special purpose associative processor implementation which can eliminate loss of frame synchronization due to frame pattern bit errors and reduce frame synchronization time to its minimum value by eliminating the time spent dwelling at false frame positions is presented.
Keywords :
CADCAM; Computer aided manufacturing; Decoding; Multiplexing; Phase frequency detector; Propagation losses; Road transportation; Signal processing; Synchronization; Transmitters; Associative memory (AM); associative processor; content-addressed memory (CAM); framing strategies; multiple match resolver; parallel processor; synchronization techniques;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1977.5009296