• DocumentCode
    962137
  • Title

    Memory and logic circuits using semiconductor-barrier Josephson junctions

  • Author

    Lum, W.Y. ; Chan, H.W. ; Van Duzer, T.

  • Author_Institution
    Naval Electronics Lab., San Diego, Ca
  • Volume
    13
  • Issue
    1
  • fYear
    1977
  • fDate
    1/1/1977 12:00:00 AM
  • Firstpage
    48
  • Lastpage
    51
  • Abstract
    Theoretical and experimental studies on the use of semiconductor-barrier Josephson junctions in switching circuits are reported. This work includes memory loops as well as latching and nonlatching logic circuits. It has been found previously that the switching time of a single junction (67 ps) is comparable with a similar oxide-barrier junction and that the Q of the junction is considerably lower than the oxide-barrier counterpart, as was predicted theoretically, so cavity resonance effects are nearly absent. The memory loop switching time measured is comparable with those employing oxide-barrier junction. The current experimental work on logic circuits is using semiconductor-barrier junctions as they can be made to give the desired values of the McCumber parameter βcrequired to achieve nonlatching operation. In all cases the junctions used are Pb-Te-Pb sandwich structures.
  • Keywords
    Josephson device logic circuits; Josephson device memories; Tellurium materials/devices; Current measurement; Inductance; Insulation; Josephson junctions; Logic circuits; Resonance; Superconducting logic circuits; Switching circuits; Time measurement; Voltage;
  • fLanguage
    English
  • Journal_Title
    Magnetics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9464
  • Type

    jour

  • DOI
    10.1109/TMAG.1977.1059430
  • Filename
    1059430