Title :
Design of reprogrammable FPLA
Author_Institution :
Dept. of Comput. Eng., Case Western Reserve Univ., Cleveland, OH, USA
fDate :
5/25/1989 12:00:00 AM
Abstract :
A new design scheme for field programmable logic arrays is presented. The proposed design uses transistors with double polysilicon gates instead of fuses. The design is highly useful since the PLA can be programmed again and again without any constraint. The proposed design offers the concept of reusable hardware to implement combinational circuits.
Keywords :
MOS integrated circuits; PLD programming; combinatorial circuits; integrated logic circuits; logic arrays; logic design; NMOS technology; combinational circuits; design scheme; double polysilicon gates; field programmable logic arrays; reprogrammable FPLA; reusable hardware; transistors;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19890484
