DocumentCode
962377
Title
Some system implications of a Josephson computer technology
Author
Marcus, M.J.
Author_Institution
IBM Thomas J. Watson Research Center, Yorktown Heights, NY
Volume
69
Issue
4
fYear
1981
fDate
4/1/1981 12:00:00 AM
Firstpage
404
Lastpage
409
Abstract
The Josephson Technology as now understood is projected onto a current computer mainframe, the IBM 3033 to estimate its effect. This is a hypothetical projection and should not be taken in any way to represent a planned product. A three cycle critical case path is identified. Then an experimental 2.5-µm Josephson current injection logic (CIL) circuit family and cache memory design are configured into a functionally equivalent Josephson package. Propagation distances in the hypothetical package are estimated to be 6 percent of those in the comparison mainframe; estimated cycle time is 4 ns yielding an internal performance improvement by a factor of > 14. The Josephson version of the IBM 3033 would entail a more than 99-percent reduction in regulated power.
Keywords
Buffer storage; Computer architecture; Fabrication; Josephson effect; Josephson junctions; Logic circuits; Logic design; Packaging; Superconducting logic circuits; Yield estimation;
fLanguage
English
Journal_Title
Proceedings of the IEEE
Publisher
ieee
ISSN
0018-9219
Type
jour
DOI
10.1109/PROC.1981.11985
Filename
1456253
Link To Document