Title :
Comment on the speed of binary multiplication using cellular arrays
Author :
Majithia, J.C. ; Siemens, K.H.
Author_Institution :
University of Waterloo, Department of Electrical Engineering, Waterloo, Canada
Abstract :
A known recoding algorithm is considered and is shown to yield a speed improvement of approximately 33% for serial multiplication. However, in the case of cellular-array multipliers, such a recoding appears to offer no advantage; instead, it may even result in a speed penalty owing to the sequential nature of the recoding algorithm.
Keywords :
cellular arrays; multiplying circuits; binary multiplication; cellular arrays; serial multiplication; speed;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19710289
