DocumentCode
963632
Title
Checkpoint Repair for High-Performance Out-of-Order Execution Machines
Author
Hwu, Wen-Mei W. ; Patt, Yale N.
Author_Institution
Computer Science Division, University of California, Berkeley, CA.; Department of Electrical and Computer Engineering, University of Illinois, Urbana-Champaign, IL.
Issue
12
fYear
1987
Firstpage
1496
Lastpage
1514
Abstract
Out-or-order execution and branch prediction are two mechanisms that can be used profitably in the design of supercomputers to increase performance. Proper exception handling and branch prediction miss handling in an out-of-order execution machine do require some kind of repair mechanism which can restore the machine to a known previous state. In this paper we present a class of repair mechanisms using the concept of checkpointing. We derive several properties of checkpoint repair mechanisms. In addition, we provide algorithms for performing checkpoint repair that incur little overhead in time and modest cost in hardware. We also note that our algorithms require no additional complexity or time for use with write-back cache memory systems than they do with write-through cache memory systems, contrary to statements made by previous researchers.
Keywords
Cache memory; Checkpointing; Computer architecture; Cost function; Engines; Hardware; Mechanical factors; Microarchitecture; Out of order; Supercomputers; Branch prediction repair; checkpoint repair; high-performance computer architecture; high-performance execution; out-of-order exception handling; out-of-order execution;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1987.5009500
Filename
5009500
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