DocumentCode
963763
Title
Intel´s secret is out
Author
Perry, T.S.
Volume
26
Issue
4
fYear
1989
fDate
4/1/1989 12:00:00 AM
Firstpage
22
Lastpage
28
Abstract
The design and development of the million-transistor N10 chip, which is aimed at workstations and supercomputers, is described. This superfast microprocessor is also the company´s first chip to use a reduced instruction set. The chip is designed for testability, executes each instruction in one clock cycle, and features on-chip parallelism.<>
Keywords
microprocessor chips; reduced instruction set computing; Intel; N10 chip; on-chip parallelism; reduced instruction set; supercomputers; superfast microprocessor; testability; workstations; CMOS technology; Computer architecture; Computer graphics; Design engineering; Electric shock; Microcomputers; Microprocessors; Reduced instruction set computing; Supercomputers; Workstations;
fLanguage
English
Journal_Title
Spectrum, IEEE
Publisher
ieee
ISSN
0018-9235
Type
jour
DOI
10.1109/6.24150
Filename
24150
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