• DocumentCode
    963959
  • Title

    An equidistant digital trigger scheme for 3-φ thyristor converters

  • Author

    Bhat, S.Ashoka Krishna

  • Author_Institution
    National Aeronautical Laboratory, Bangalore, India
  • Volume
    69
  • Issue
    9
  • fYear
    1981
  • Firstpage
    1159
  • Lastpage
    1161
  • Abstract
    A simple digital trigger scheme to generate equidistant firing pulses by using 1-φ sensing, for triggering 3-φ thyristor converters is presented. The scheme explained can take data directly from the CPU of a microprocessor. The correction of firing angle takes place within 1/6th of the input period. The experimental results obtained with 8 bits of operation are presented.
  • Keywords
    Circuits; Delay; Digital control; Frequency; Microprocessors; Phase locked loops; Pulse amplifiers; Pulse generation; Thyristors; Voltage control;
  • fLanguage
    English
  • Journal_Title
    Proceedings of the IEEE
  • Publisher
    ieee
  • ISSN
    0018-9219
  • Type

    jour

  • DOI
    10.1109/PROC.1981.12135
  • Filename
    1456403
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=963959