DocumentCode
964283
Title
Process modeling of integrated circuit device technology
Author
Dutton, Robert W. ; Hansen, Stephen E.
Author_Institution
Stanford University, Stanford, CA
Volume
69
Issue
10
fYear
1981
Firstpage
1305
Lastpage
1320
Abstract
This paper reviews the field of computer-aided design as applied to process modeling of integrated circuit technology and devices. Device design applications for process modeling are considered for both bipolar and NMOS technologies. The kinetics of oxidation and impurity diffusion in silicon are discussed. The numerical solution of impurity diffusion is considered, including grid and time step constraints. New efforts in two-dimensional process modeling are briefly discussed along with test structure work needed for parameter estimation.
Keywords
Application software; Design automation; Impurities; Integrated circuit modeling; Integrated circuit technology; Kinetic theory; MOS devices; Oxidation; Process design; Silicon;
fLanguage
English
Journal_Title
Proceedings of the IEEE
Publisher
ieee
ISSN
0018-9219
Type
jour
DOI
10.1109/PROC.1981.12168
Filename
1456436
Link To Document