DocumentCode :
964905
Title :
Performance of a differential coincidence-type self bit synchroniser at low s.n.r.
Author :
Chakrabarti, N.B. ; Gangopadhyay, Ranjan
Author_Institution :
Indian institute of Technology, Department of Electronics & Electrical Communication Engineering, Kharagpur, India
Volume :
10
Issue :
10
fYear :
1974
Firstpage :
190
Lastpage :
191
Abstract :
The behaviour of a differential coincidence-type self bit synchroniser at low s.n.r. has been examined for both uncorrelated and correlated input noise. It has been found that the performance of this synchroniser is comparable with that of a digital-data-transition tracking loop, and is better than that of an early-late-gate bit synchroniser.
Keywords :
coincidence circuits; data communication systems; digital communication systems; digital signals; noise; synchronisation; S/N ratio; coincidence circuits; differential coincidence type self bit synchroniser; digital communication systems; digital signals; performance; synchronisation; tracking loop;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19740145
Filename :
4245104
Link To Document :
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