• DocumentCode
    965329
  • Title

    Relative figures of merit for chip-to-MCM substrate interconnection methods

  • Author

    Shrivastava, Udbhava A. ; Valetine, W. ; Mahalingam, Mali

  • Author_Institution
    Intel Corp., Chandler, AZ, USA
  • Volume
    16
  • Issue
    6
  • fYear
    1993
  • fDate
    9/1/1993 12:00:00 AM
  • Firstpage
    598
  • Lastpage
    605
  • Abstract
    Functional performance of an electronic system is proportional to the functional throughput rate, which is defined as the product of the function density (gates/cm2) and the clock rate. Various chip-to-module assembly methods for high-density substrates can provide a functional throughput rate approaching that of the integrated circuit (IC). Results of a comparative study for the performance of simultaneously switching off-chip drivers in various multichip module (MCM) scenarios are reported for CMOS and emitter-coupled-logic (ECL) technologies. Flip-chip technology can provide up to twelvefold improvement in performance over tab automated bonding (TAB) for a CMOS system, and about sevenfold improvement for an ECL system. However, when the delay in the critical path is dominated by on-chip circuits, speed improvement by MCM becomes negligible. Electrical parasitics of the chip-to-substrate interconnections also create undershoot in the switching signal, which reduces the noise margin. It is concluded that the advantages of high-density multichip packaging, in decreasing order of importance, are density of integration, reduction in the switching noise, shorter off-chip delays, and reduction in power dissipation
  • Keywords
    flip-chip devices; microassembling; multichip modules; CMOS; ECL; chip-to-MCM substrate interconnection methods; chip-to-module assembly methods; chip-to-substrate interconnections; clock rate; flip-chip technology; function density; functional throughput rate; noise margin; off-chip drivers; power dissipation; speed improvement; switching signal; undershoot; Assembly; CMOS technology; Circuit noise; Clocks; Delay; Driver circuits; Integrated circuit interconnections; Integrated circuit technology; Noise reduction; Throughput;
  • fLanguage
    English
  • Journal_Title
    Components, Hybrids, and Manufacturing Technology, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0148-6411
  • Type

    jour

  • DOI
    10.1109/33.241785
  • Filename
    241785