Optimization of thin-film resistive-gate and capacitive-gate GaAs charge-coupled devices

Author

Ula, Nazmul ; Cooper, Gregory A. ; Davidson, J. Countney ; Swierkowski, Steve P. ; Hunt, Charles E.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., California Univ., Davis, CA, USA

Volume

39

Issue

5

fYear

1992

fDate

5/1/1992 12:00:00 AM

Firstpage

1032

Lastpage

1040

Abstract

Computer simulation of high-speed gallium arsenide charge coupled devices (CCDs) was performed using a two-dimensional semiconductor device simulation program. The measured performance of fabricated GaAs CCDs is compared with modeled results. The effect of active layer thickness and doping concentration on the charge transfer efficiency (CTE) and the dynamic range is investigated using different layers. Various gate architectures are compared for optimum dynamic range and compatibility with GaAs MESFET technology. The effect of clock shape on CTE is studied. Sensitivity analysis is performed on output structures. Both capacitive-gate CCD (CGCCD) and resistive-gate CCD (RGCCD) techniques are considered

Keywords

III-V semiconductors; charge-coupled device circuits; gallium arsenide; semiconductor device models; 2D device simulation; CTE; GaAs; active layer thickness; capacitive-gate CCD; charge transfer efficiency; clock shape; compatibility with GaAs MESFET technology; computer simulation; doping concentration; dynamic range; gate architectures; performance; resistive-gate CCD; semiconductor device simulation program; semiconductors; Charge coupled devices; Charge-coupled image sensors; Computational modeling; Computer simulation; Dynamic range; Gallium arsenide; Semiconductor devices; Semiconductor process modeling; Semiconductor thin films; Transistors;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.129079

Filename

129079