DocumentCode
965988
Title
Gate-oxide thickness dependence of hot-carrier-induced degradation in buried p-MOSFET´s
Author
Hiroki, Akira ; Odanaka, Shinji
Author_Institution
Matsushita Electr. Ind. Co. Ltd., Osaka, Japan
Volume
39
Issue
5
fYear
1992
fDate
5/1/1992 12:00:00 AM
Firstpage
1223
Lastpage
1228
Abstract
The gate-oxide thickness dependence of hot-carrier-induced degradation in buried p-MOSFETs is described. The results reveal that the thinner gate oxide provides higher hot-carrier resistance even with high hot-electron generation. A significant improvement of the threshold voltage shift is obtained for a buried p-MOSFET with a thin gate oxide of 7 nm at a wide range of stress gate voltages. This effect is induced by a significantly different mechanism from that of n-MOSFETs. The mechanism is explained by using a numerical degradation simulation, which self-consistently includes the models for the hot-carrier transport in silicon, emission process, carrier behavior in the oxide, and carrier trapping. It is found that the degradation of the buried p-MOSFETs is characterized by the dynamics of the electron heating process during stress and the corresponding position of the trapped electrons
Keywords
hot carriers; insulated gate field effect transistors; reliability; semiconductor device models; 7 nm; buried p-MOSFETs; carrier behavior; carrier trapping; electron heating process; emission process; gate-oxide thickness dependence; hot-carrier resistance; hot-carrier transport; hot-carrier-induced degradation; numerical degradation simulation; submicron transistors; thin gate oxide; threshold voltage shift; trapped electrons; Degradation; Electron traps; Hot carrier effects; Hot carriers; Interface states; MOSFET circuits; Numerical simulation; Silicon; Stress; Threshold voltage;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.129107
Filename
129107
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