Silicon-On-Silicon Packaging

Honeywell´s new packaging technique uses silicon as a multichip substrate. Multiple integrated circuit (IC) chips are flip bonded by controlled collapse joining to a silicon substrate. The silicon substratc provides the interconnections between chips and the next level of interface. The silicon substrate is subseqently epoxy bonded to a ceramic substrate, and the package is then completed by wire bonding and hermetic sealing. Silicon-on-silicon packaging offers six advantages: 1) excellent thermal matching, 2) high packaging density, 3) commonality of fabrication using conventional IC processes, 4) low cost per function, 5) repairability, 6) and mixing of IC technologies (MOS bipolar linear, etc.) on the same silicon substrate.