DocumentCode
967005
Title
Design of High-Order Phase-Lock Loops
Author
Carlosena, Alfonso ; Mànuel-Lázaro, Antonio
Author_Institution
Dept. Electr. & Electron. Eng., Univ. Publica de Navarra, Pamplona
Volume
54
Issue
1
fYear
2007
Firstpage
9
Lastpage
13
Abstract
The analysis, and design of third-order, (and higher) phase-locked loops (PLL) is difficult. This paper presents a novel approach to overcome these difficulties by allowing high-order loops to be viewed as a natural extension of lower order ones. This is accomplished by adding nested first-order feedback loops around a basic first-order loop filter. Our approach will also be related to the concept of PLLs with aided acquisition. The model presented has been implemented and tested in Simulink
Keywords
circuit feedback; phase locked loops; Simulink; analog signal processing; feedback systems; first-order loop filter; high-order phase-lock loops; nested first-order feedback loops; Equations; Feedback loop; Filters; Frequency; Phase locked loops; Radar detection; Signal detection; Spread spectrum radar; Stability analysis; Voltage-controlled oscillators; Analog signal processing; feedback systems; loop filters (LFs); phase-locked loops (PLLs);
fLanguage
English
Journal_Title
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher
ieee
ISSN
1549-7747
Type
jour
DOI
10.1109/TCSII.2006.883205
Filename
4063458
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