DocumentCode
967541
Title
An empirical study of high-order single-bit delta-sigma modulators
Author
Schreier, Richard
Author_Institution
Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA
Volume
40
Issue
8
fYear
1993
fDate
8/1/1993 12:00:00 AM
Firstpage
461
Lastpage
466
Abstract
Computer simulations are used to determine the stability limits of single-bit delta-sigma modulators up to order 8. It is found that none of the existing criteria for stability are adequate for design. Plots of the maximum signal-to-noise ratio (SNR) achievable with a given modulator order and oversampling ratio (OSR) are presented. These graphs can be used to determine the modulator order and OSR required to achieve a given SNR or to check the tightness of (as yet unavailable) theoretical bounds
Keywords
delta modulation; modulators; noise; stability criteria; ADC; DAC; SNR; delta-sigma modulators; high-order; modulator order; oversampling ratio; signal-to-noise ratio; simulation model; single-bit; stability limits; Circuit simulation; Computer simulation; Delta modulation; Digital modulation; Digital-analog conversion; Frequency conversion; Noise shaping; Quantization; Signal to noise ratio; Stability criteria;
fLanguage
English
Journal_Title
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
Publisher
ieee
ISSN
1057-7130
Type
jour
DOI
10.1109/82.242348
Filename
242348
Link To Document