• DocumentCode
    967865
  • Title

    Digitizing, layout, rule checking—The everyday tasks of chip designers

  • Author

    Avenier, Jean Pierre

  • Author_Institution
    Thomson-EFCJS, Grenoble Cedex, France
  • Volume
    71
  • Issue
    1
  • fYear
    1983
  • Firstpage
    49
  • Lastpage
    56
  • Abstract
    The layout phase is most critical in the design of integrated circuits (IC´s) because of the cost of the phase itself, since it involves expensive tools and a large amount of human intervention, and also because of the consequences for production Cost. Several approaches are used that need more or less computer and/or man time. The compromise is difficult because of the number of parameters to be taken into account. This paper presents the methods most commonly used with their advantages and disadvantages.
  • Keywords
    Computer displays; Costs; Graphics; Helium; Humans; Integrated circuit layout; Integrated circuit yield; Production; Very large scale integration; Wiring;
  • fLanguage
    English
  • Journal_Title
    Proceedings of the IEEE
  • Publisher
    ieee
  • ISSN
    0018-9219
  • Type

    jour

  • DOI
    10.1109/PROC.1983.12526
  • Filename
    1456794