DocumentCode :
968435
Title :
Multilayer Printed Circuit Interconnection Techniques
Author :
Levy, Alfred
Author_Institution :
Productin Enigneering, Defense Electronic Prod., R. C. A.
Volume :
8
Issue :
1
fYear :
1964
fDate :
4/1/1964 12:00:00 AM
Firstpage :
16
Lastpage :
20
Abstract :
Proponents of the various miniaturization techniques claim advantages of: reduced size, weight and cost, and increased reliability. Reduction in size and weight are obvious consequences of the technique. Reduced cost and improved reliability are still to be proven. Shrinking electronic assemblies and sub-assemblies bring about interconnection problems to the packaging engineer. Interconnecting devices are not only a factor in weight and size, but are a weak link in the reliability chain of the complete electronic system. These matters are considered in this report with especial attention to multilayer printed circuit boards.
Keywords :
Copper; Etching; Gold; Ink; Insulation; Integrated circuit interconnections; Lead; Nonhomogeneous media; Printed circuits; Resists;
fLanguage :
English
Journal_Title :
Product Engineering and Production, IEEE Transactions on
Publisher :
ieee
ISSN :
0097-4544
Type :
jour
DOI :
10.1109/TPEP.1964.1136546
Filename :
1136546
Link To Document :
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