• DocumentCode
    968628
  • Title

    Optimal skip-block considerations for regenerative carry-skip adders

  • Author

    Hobson, Richard F.

  • Author_Institution
    Sch. of Comput. Sci., Simon Fraser Univ., Burnaby, BC, Canada
  • Volume
    30
  • Issue
    9
  • fYear
    1995
  • fDate
    9/1/1995 12:00:00 AM
  • Firstpage
    1020
  • Lastpage
    1024
  • Abstract
    The regenerative carry based addition scheme has been found to be fast, area efficient, and power efficient. Previous work demonstrated the effectiveness of this technique compared with other fast adder techniques. This paper discusses optimization choices for carry-skip blocks, as well as some practical issues for speeding up the physical implementation
  • Keywords
    CMOS logic circuits; adders; carry logic; circuit optimisation; logic design; optimal skip-block; regenerative carry based addition scheme; regenerative carry-skip adders; speed improvement; Adders; CMOS process; Capacitance; Circuits; Clocks; Councils; Helium; Microelectronics; Signal generators; Velocity measurement;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/4.406402
  • Filename
    406402