Title :
CMOS analog divider and four-quadrant multiplier using pool circuits
Author :
Liu, Shen-Iuan ; Chang, Cheng-Chieh
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fDate :
9/1/1995 12:00:00 AM
Abstract :
CMOS divider and four-quadrant multiplier circuits using the pool circuits are presented. Using CMOS differential amplifiers and MOS transistors biased in the saturation region, the new analog divider and multiplier are presented. Experimental and simulation results are given-to verify the theoretical analyses. The proposed circuits are expected to be useful in analog signal processing applications
Keywords :
CMOS analogue integrated circuits; analogue multipliers; differential amplifiers; dividing circuits; CMOS analog divider; CMOS differential amplifiers; MOS transistors; analog signal processing applications; four-quadrant multiplier; pool circuits; saturation region biased MOSFETs; Analytical models; CMOS analog integrated circuits; Circuit simulation; Computational modeling; Differential amplifiers; MOS devices; MOSFETs; Signal processing; Threshold voltage; Transconductance;
Journal_Title :
Solid-State Circuits, IEEE Journal of
