DocumentCode
968637
Title
CMOS analog divider and four-quadrant multiplier using pool circuits
Author
Liu, Shen-Iuan ; Chang, Cheng-Chieh
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume
30
Issue
9
fYear
1995
fDate
9/1/1995 12:00:00 AM
Firstpage
1025
Lastpage
1029
Abstract
CMOS divider and four-quadrant multiplier circuits using the pool circuits are presented. Using CMOS differential amplifiers and MOS transistors biased in the saturation region, the new analog divider and multiplier are presented. Experimental and simulation results are given-to verify the theoretical analyses. The proposed circuits are expected to be useful in analog signal processing applications
Keywords
CMOS analogue integrated circuits; analogue multipliers; differential amplifiers; dividing circuits; CMOS analog divider; CMOS differential amplifiers; MOS transistors; analog signal processing applications; four-quadrant multiplier; pool circuits; saturation region biased MOSFETs; Analytical models; CMOS analog integrated circuits; Circuit simulation; Computational modeling; Differential amplifiers; MOS devices; MOSFETs; Signal processing; Threshold voltage; Transconductance;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.406403
Filename
406403
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