DocumentCode
969680
Title
An interpreter for IEEE logic symbols
Author
Lahti, Jukka ; Kostamovaara, Juha
Author_Institution
Dept. of Electr. Eng., Oulu Univ., Finland
Volume
38
Issue
3
fYear
1995
fDate
8/1/1995 12:00:00 AM
Firstpage
237
Lastpage
242
Abstract
A CAD-system for logic design based on the use of IEEE standard logic symbols is described. The system, called DEMET, can be used to specify the operation of digital logic components entirely graphically with IEEE symbols. DEMET can automatically interpret the symbols, and generate functional simulation models for them. IEEE symbols can be simulated with a built-in logic simulator. DEMET uses computer graphics methods for visualizing the operation of logic circuits, which makes it an excellent aid for undergraduate level digital logic design courses
Keywords
circuit analysis computing; computer aided instruction; computer science education; electronic engineering education; engineering graphics; logic CAD; logic circuits; logic design; CAD system; DEMET; IEEE logic symbols interpreter; computer graphics methods; digital logic components; functional simulation models; logic design; undergraduate level digital logic design courses; Application specific integrated circuits; Circuit simulation; Computational modeling; Computer graphics; Documentation; Integrated circuit technology; Logic circuits; Logic design; Logic functions; Programmable logic arrays;
fLanguage
English
Journal_Title
Education, IEEE Transactions on
Publisher
ieee
ISSN
0018-9359
Type
jour
DOI
10.1109/13.406500
Filename
406500
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