A CMOS combinational circuit-design method using mixed logic concepts

Author

Hudson, William B. ; Beasley, Jeffrey S. ; Steelman, J. Eldon

Author_Institution

Dept. of Electr. & Comput. Eng., Kansas State Univ., Manhattan, KS, USA

Volume

38

Issue

3

fYear

1995

fDate

8/1/1995 12:00:00 AM

Firstpage

266

Lastpage

273

Abstract

Presented in this paper is a method which can be used for the implementation of CMOS transistor combinational circuit design using mixed logic digital design techniques. The mixed logic method presented in this paper provides a systematic way of developing minimal transistor count combinational circuits. Additionally, students find the straight forward rules associated with the mixed logic design method allows them to quickly develop CMOS combinational circuit design skills. Examples of the circuit realizations developed using mixed and positive logic design methods as well as a comparison of the design methods are presented in this paper

Keywords

CMOS logic circuits; MOSFET; circuit CAD; combinational circuits; electronic engineering education; integrated circuit design; logic CAD; logic design; CMOS combinational circuit-design method; CMOS transistor; circuit realizations; design skills; education; mixed logic digital design techniques; students; CMOS digital integrated circuits; CMOS logic circuits; Combinational circuits; Design methodology; Helium; Logic circuits; Logic design; Logic devices; Low voltage; Very large scale integration;

fLanguage

English

Journal_Title

Education, IEEE Transactions on

Publisher

ieee

ISSN

0018-9359

Type

jour

DOI

10.1109/13.406505

Filename

406505