An analog/digital BCDMOS technology with dielectric isolation-devices and processes

Author

Lu, C.-Y. ; Tsai, N.-S. ; Dunn, Charles N. ; Riffe, Pamela C. ; Shibib, M.A. ; Furnanage, Richard A. ; Goodwin, C.A.

Author_Institution

AT&T Bell Labs., Reading, PA, USA

Volume

35

Issue

2

fYear

1988

fDate

2/1/1988 12:00:00 AM

Firstpage

230

Lastpage

239

Abstract

A dielectrically isolated bipolar-CMOS-DMOS (BCDMOS) integrated-circuit technology that has been successfully developed for high-voltage applications (150-500 V) is reported. This technology integrates bipolar, CMOS, DMOS, p-n-p-n, JFET, and DGDMOS (dual-gate DMOS) devices on a single chip. The core BCDMOS process is chosen to be an optimized poly-gate n-channel DMOS process; additional levels and their relative sequences were chosen on the basis of their effects on the performance of the various kinds of devices in the chip and the trade-offs among those performances. The characteristics of the major devices in solid-state switches for telecommunication applications are demonstrated

Keywords

integrated circuit technology; monolithic integrated circuits; power integrated circuits; 150 to 500 V; HVIC; bipolar CMOS DMOS technology; dielectric isolation; high-voltage applications; integrated-circuit technology; poly-gate n-channel DMOS process; solid-state switches; telecommunication applications; CMOS process; CMOS technology; Dielectric devices; Displays; Integrated circuit technology; Isolation technology; Solid state circuits; Switches; Telecommunication control; Telecommunication switching;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.2443

Filename

2443