Methods of removing single variable static hazards in Boolean functions

Author

Sandige, Richard S. ; Wilamowski, Bogdan M.

Author_Institution

Dept. of Electr. Eng., Wyoming Univ., Laramie, WY, USA

Volume

38

Issue

3

fYear

1995

fDate

8/1/1995 12:00:00 AM

Firstpage

274

Lastpage

278

Abstract

Two methods are presented in this paper for removing single variable static hazards in Boolean Functions. The first method is a hand calculation method that uses a single variable static hazard cover algorithm. The hand calculation method can be used in the classroom and does not require computer assistance. The second method involves using a single variable static hazard cover software synthesis tool. The second method is more convenient to use outside the classroom on a PC that is available for engineering student use or perhaps on personal computers. To illustrate the process of obtaining single variable static hazard covers, the standard Karnaugh map approach is also used. A commercially available design synthesis tool and schematic capture/simulation timing tool are also used in this paper

Keywords

Boolean functions; asynchronous circuits; computer aided instruction; computer science education; electronic engineering education; logic CAD; logic circuits; microcomputer applications; Boolean functions; PC; asynchronous logic circuit design; computer science; design synthesis tool; electronic engineering student; hand calculation method; personal computers; schematic capture/simulation timing tool; single variable static hazard cover algorithm; single variable static hazards removal; software synthesis tool; standard Karnaugh map approach; Boolean functions; Circuit synthesis; Delay effects; Equations; Hazards; Input variables; Logic circuits; Microcomputers; Software tools; Timing;

fLanguage

English

Journal_Title

Education, IEEE Transactions on

Publisher

ieee

ISSN

0018-9359

Type

jour

DOI

10.1109/13.406506

Filename

406506