DocumentCode :
970420
Title :
Current testability analysis of feedback bridging faults in CMOS circuits
Author :
Roca, Miquel ; Rubio, Antonio
Author_Institution :
Dept. of Phys., Univ. Illes Balears, Palma de Mallorca, Spain
Volume :
14
Issue :
10
fYear :
1995
fDate :
10/1/1995 12:00:00 AM
Firstpage :
1299
Lastpage :
1305
Abstract :
An exhaustive classification of bridging faults between pairs of logic level circuit nodes and an IDDQ testability analysis scheme for these faults are presented in this paper. The case of feedback bridging faults producing oscillations is considered in detail. The testability of such faults is verified through a set of experiments with specially implemented ASIC´s
Keywords :
CMOS logic circuits; application specific integrated circuits; circuit feedback; circuit oscillations; fault diagnosis; integrated circuit testing; logic testing; ASIC; CMOS circuits; IDDQ testability analysis scheme; current testability analysis; feedback bridging faults; logic level circuit nodes; oscillations; Bridge circuits; CMOS digital integrated circuits; CMOS logic circuits; CMOS technology; Circuit faults; Circuit testing; Energy consumption; Feedback circuits; Logic circuits; Logic testing;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.466345
Filename :
466345
Link To Document :
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