• DocumentCode
    970931
  • Title

    Experience with pipelined multiple instruction streams

  • Author

    Jordan, Harry F.

  • Author_Institution
    University of Colorado, Boulder, CO, USA
  • Volume
    72
  • Issue
    1
  • fYear
    1984
  • Firstpage
    113
  • Lastpage
    123
  • Abstract
    Pipelining has been used to implement efficient, high-speed vector computers. It is also an effective method for implementing multiprocessors. The Heterogeneous Element Processor (HEP) built by Denelcor Incorporated is the first commercially available computer system to use pipelining to implement multiple processes. This paper introduces the architecture and programming environment of the HEP and surveys a range of scientific applications programs for which parallel versions have been produced, tested, and analyzed on this computer. In all cases, the ideal of one instruction completion every pipeline step time is closely approached. Speed limitations in the parallel programs are more often a result of the extra code necessary to ensure synchronization than of actual synchronization lockout at execution time. The pipelined multiple instruction stream architecture is shown to cover a wide range of applications with good utilization of the parallel hardware.
  • Keywords
    Application software; Arithmetic; Computer architecture; Concurrent computing; Hardware; Parallel processing; Parallel programming; Pipeline processing; Prototypes; Testing;
  • fLanguage
    English
  • Journal_Title
    Proceedings of the IEEE
  • Publisher
    ieee
  • ISSN
    0018-9219
  • Type

    jour

  • DOI
    10.1109/PROC.1984.12823
  • Filename
    1457091