DocumentCode
972
Title
Compiler-Directed Energy Reduction Using Dynamic Voltage Scaling and Voltage Islands for Embedded Systems
Author
Ozturk, Ozcan ; Kandemir, Mahmut ; Chen, Guangyu
Author_Institution
Dept. of Comput. Eng., Bilkent Univ., Ankara, Turkey
Volume
62
Issue
2
fYear
2013
fDate
Feb. 2013
Firstpage
268
Lastpage
278
Abstract
Addressing power and energy consumption related issues early in the system design flow ensures good design and minimizes iterations for faster turnaround time. In particular, optimizations at software level, e.g., those supported by compilers, are very important for minimizing energy consumption of embedded applications. Recent research demonstrates that voltage islands provide the flexibility to reduce power by selectively shutting down the different regions of the chip and/or running the select parts of the chip at different voltage/frequency levels. As against most of the prior work on voltage islands that mainly focused on the architecture design and IP placement related issues, this paper studies the necessary software compiler support for voltage islands. Specifically, we focus on an embedded multiprocessor architecture that supports both voltage islands and control domains within these islands, and determine how an optimizing compiler can automatically map an embedded application onto this architecture. Such an automated support is critical since it is unrealistic to expect an application programmer to reach a good mapping correlating multiple factors such as performance and energy at the same time. Our experiments with the proposed compiler support show that our approach is very effective in reducing energy consumption. The experiments also show that the energy savings we achieve are consistent across a wide range of values of our major simulation parameters.
Keywords
circuit optimisation; electronic engineering computing; embedded systems; multiprocessing systems; optimising compilers; parallel architectures; power aware computing; power consumption; IP placement; architecture design; compiler-directed energy reduction; dynamic voltage scaling; embedded application; embedded multiprocessor architecture; embedded system; energy consumption; energy saving; frequency level; optimization; optimizing compiler; power consumption; power reduction; software compiler; software level; system design flow; voltage islands; voltage level; Assembly; Computer architecture; Energy consumption; Indexes; Multimedia communication; Optimization; Parallel processing; Voltage islands; compiler optimizations; compiler-based parallelization; energy consumption; voltage scaling;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.2011.229
Filename
6095515
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