Title :
Back-gate forward bias method for low-voltage CMOS digital circuits
Author :
Chen, Ming-Jer ; Ho, Jih-Shin ; Huang, Tzuen-Hsi ; Yang, Chuang-Hen ; Jou, Yeh-Ning ; Wu, Tsai-Fu ; Wu, Terry
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fDate :
6/1/1996 12:00:00 AM
Abstract :
The back-gate forward bias method suitable for present standard bulk CMOS processes has been promoted for low-voltage digital circuit application. A CMOS inverter employing the method has experimentally exhibited the ability of electrically adjusting the transition region of the dc voltage transfer characteristics. Transient measurement has further shown that the inverter with a back-gate forward bias of 0.4 V can operate at low supply voltages down to 0.6 V without significant loss in switching speed. Guidelines for ensuring proper implementation of the method in a bulk CMOS process have been set up against latch-up, parasitic bipolar, impact ionization, and stand by current. Following these guidelines, a cost-effective low power, low-voltage, high-density mixed mode CMOS analog/digital integrated circuits chip with both reasonable speed and improved precision has been projected for the first time
Keywords :
CMOS digital integrated circuits; characteristics measurement; impact ionisation; integrated circuit measurement; logic gates; 0.4 V; 0.6 V; back-gate forward bias method; dc voltage transfer characteristics; impact ionization; inverter; latch-up; low-voltage CMOS digital circuits; parasitic bipolar current; stand by current; switching speed; transition region; CMOS analog integrated circuits; CMOS digital integrated circuits; CMOS process; Digital circuits; Guidelines; Impact ionization; Inverters; Loss measurement; Low voltage; Velocity measurement;
Journal_Title :
Electron Devices, IEEE Transactions on
