DocumentCode
972572
Title
An 8 µm period bubble memory device with relaxed function designs
Author
Orihara, S. ; Yanase, T. ; Majima, T.
Author_Institution
Fujitsu Laboratories, Ltd., Kawasaki, Japan
Volume
15
Issue
6
fYear
1979
fDate
11/1/1979 12:00:00 AM
Firstpage
1692
Lastpage
1696
Abstract
A new design concept for 8 μm period bubble memory devices is proposed. Pattern periods and sizes in function designs are increased, keeping the storage cell size 8 μm × 8 μm. This can relax spacial restrictions for the function pattern designs and is remarkably effective in maintaining low drive fields for the functions. Chip organizations which match this function design are discussed and a 256 kbit 8 μm period chip organized with block replicate gates and true swap gates has been designed. The characteristics obtained for the drive field, replicate phase margin, swap current margin, etc., are as good as those of 16 μm period 3 μm bubble devices. A chip organization of a 1 megabit device with a short access time is also proposed.
Keywords
Magnetic bubble memories; Conductors; Design for experiments; Detectors; Frequency; High definition video; Magnetic field measurement; Magnetic heads; Potential well; Space vector pulse width modulation; Strips;
fLanguage
English
Journal_Title
Magnetics, IEEE Transactions on
Publisher
ieee
ISSN
0018-9464
Type
jour
DOI
10.1109/TMAG.1979.1060402
Filename
1060402
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