DocumentCode
972626
Title
A Multiphase Timing-Skew Calibration Technique Using Zero-Crossing Detection
Author
Wang, Chung-Yi ; Wu, Jieh-Tsorng
Author_Institution
Dept. of Electron. Eng., Nat. Chiao-Tung Univ., Hsinchu
Volume
56
Issue
6
fYear
2009
fDate
6/1/2009 12:00:00 AM
Firstpage
1102
Lastpage
1114
Abstract
This paper describes a timing-skew calibration technique which equalizes the phase spacings among multiphase clocks. The scheme uses simple sample-and-hold circuits controlled by the multiphase clocks to sample a common reference input. Phase spacing is measured by counting the number of zero crossings between two adjacent sampling sequences. A zero-crossing detection scheme is proposed. It has better immunity against the offsets of the comparators used in the detector. A digital calibration processor is also proposed. It examines the outputs from the zero-crossing detectors, and then adjusts the delays of clock buffers in order to minimize timing skews. The proposed calibration scheme does not demand stringent requirement for the reference input. Its application to a eight-channel 6-b time-interleaved analog-to-digital converter is demonstrated.
Keywords
analogue-digital conversion; calibration; clocks; phase comparators; signal detection; timing circuits; clock buffer delays; comparators; digital calibration processor; eight-channel 6-b time-interleaved analog-to-digital converter; multiphase clocks; phase spacing; sample-and-hold circuits; timing-skew calibration technique; zero-crossing detection; Analog–digital conversion; calibration; clocks; phase estimation; time-interleaved; timing circuits; timing skew;
fLanguage
English
Journal_Title
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher
ieee
ISSN
1549-8328
Type
jour
DOI
10.1109/TCSI.2008.2008477
Filename
4663667
Link To Document